Robotics for Quality Testing project

Background

KDPOF (Knowledge Development for Plastic Optical Fiber) is a company that was founded in 2010. It develops semiconductors for gigabit and long-reach communications Plastic Optical Fiber (POF). By providing a flexible, robust and affordable Gigabit networking technology that efficiently approaches the theoretical limit of the channel. It is able to transfer more than 1 Gbps, while the actual data-rates are between 100 Mbps and 150 Mbps

Although they are a young company, they have already received different public recognitions, like the one “PYME INNOVADORA” that is given by the Spanish Government to the top innovative SME’s in the country. What’s more, they are currently providing their technology for some of the top players in the automotive industry, such as MERCEDES or TOYOTA

The KDPOF portfolio is a wide variety of their KD1000 family, which has many different types of products that are optimized for the respective target market with the most suitable data interface that meets the quality and cost goals of the customer. 

The challenge

KDPOF technology is offered as an Application-Specific Integrated Circuit (ASIC) or chip.

As in almost any process, the mentioned chip has to go through different quality tests to see if it is ready to be launched into the market. 

Nowadays this process of quacking the quality of the product in done manually.

What the client is looking for.

KDPOF is looking for partial creative solutions that can allow this process to be automated, reducing their labour costs and improve their quality test cycle.

For this purpose, a solution using a cheap, solid and safe collaborative robot, which will be attached to the test table, that is able to automate the following two processes is wanted:

Process 1 (Manual process shown in the attached document Process1.mp4):

• Pick the chip from a tray using a vacuum head
• Place it in the quality check point
• Press it with a power between 2000 grams (for the small chip) and 3120 grams  (for the big chip). The chip is tested during this time. Test time might be unlimited, but should be considered as 24 seconds for the output rate calculation
• Talk to test machine via API/Interface to check result of the test (OK or Fail)
• Pick it again from the quality check point using a vacuum head
• Place it in the output trays (two) according to test result

Process 2 (Manual process shown in the attached document Process2.mp4):

• Pick the chip from a tray using a vacuum head
• Place it in the quality check point
• Press it with a power between 2000 grams (for the small chip) and 3120 grams  (for the big chip). The chip is tested during this time. Test time might be unlimited, but should be considered as 240 seconds for the output rate calculation
• Send a signal to allow TEMPTRONIC work
• Position of a special machine, TEMPTRONIC, to test its temperature response (this process is already automated)
• Receive a signal when TEMPTRONIC has finished the temperature response test
• Talk to test machine via API/Interface to check result of the test (OK or Fail)
• Pick it again from the quality check point using a vacuum head
• Place it in the output trays (two) according to test result

In both cases, the tray (see in attached document Chip tray (with chips).jpg) will arrive full of chips, so programming a picking order would be enough. A vision option would be considered as an extra.

The desired output of the process 1 is 200 test/8 hours

Maximum error absorption in the socket is 0,5 mm for both the X and Y axis 

The desired budget for the project is the lowest one possible, in any case less than 30.000€.

Specific dimensions:

• Typical Chips Tray: 310 mm x 133 mm (see images Chip tray (with chips).jpg & Chip tray (without chips).jpg )
• TEMPTRONIC: 115 mm of diameter (see Temptronic Arm.jpg, Chip Test Machine & Temptronic Arm.jpg and Temptronic diameter.jpg)
• Test machine: 685 m x 820 mm x 1200 mm (see images Chip Test Machine 1,2&3.jpg)
• Chip: from5 by 5 mm up to 12 by 12 mm

Evaluation criteria

The evaluation criteria in each of the rounds of the tournament for the proposed solutions are:

• Complies with required cycle time requirements
• Lower investments and/or cost.
• Nice to have: Can be integrated into test machine.
• Feasibility evidence

This is a 3-round tournament with the following expected submissions:

First round

A 2-page PDF document, which will include:

• Describe your proposal for reducing the labor cost:
• Technical measures, impacted activities and expected reduction cost
• Equipment specifications and available suppliers
• Estimated investments and operational costs
• Sketches and new layout
• Description of the high level process to automate the parts loading and removing
• Feasibility evidences (if applicable) to support your recommendations 

Second round

• Detailed process specification.
• Detailed equipment specifications and suppliers. 
• Investments and operational costs.
• Initial proposal for real implementation at KDPOF Madrid (budget and person in charge of doing it)

Third round

• Clarifications on the process and proposed investments
• Final proposal for real implementation at KDPOF Madrid (budget and person in charge of doing it)

Timeline 

This is a 3‐round tournament with the following timing:

• 1^st round: 6 weeks to present solutions + 1 weeks for evaluation
• 2^nd round: 3 weeks to present solutions + 1 weeks for evaluation
• 3^rd round: 2 weeks + 1-week evaluation